Answer to Reset (ATR) is the response output by a Smart Card ICC conforming to ISO/IEC 7816 standards, following electrical reset of the card’s chip by a card reader. The ATR conveys information about the communication parameters proposed by the card, and the card’s nature and state. The ATR conveys information about the communication parameters proposed by the card, and the card’s nature and state. By extension, ATR often refers to a message obtained from a Smart Card in an early communication stage; or from the smart card reader used to access that card, which may transform the card’s message into an ATR-like format (this occurs e.g. for some PC/SC card readers when accessing an ISO/IEC 14443 Smart Card).
The presence of an ATR is often used as a first indication that a Smart Card appears operative, and its content examined as a first test that it is of the appropriate kind for a given usage.
Contact Smart Cards communicate over a signal named Input/Output (I/O) either synchronously (data bits are sent and received at the rhythm of one per period of the clock supplied to the card on its CLK signal) or asynchronously (data bits are exchanged over I/O with another mechanism for bit delimitation, similar to traditional asynchronous serial communication). The two modes are exclusive in a given communication session, and most cards are built with support for a single mode. Microprocessor-based contact Smart Cards are mostly of the asynchronous variety, used for all Subscriber Identity Modules (SIM) for mobile phones, those bank cards with contacts that conform to EMV specifications, all contact Java Cards, and Smart Cards for pay television. Memory-only cards are generally of the synchronous variety.
ATR under asynchronous and synchronous transmission have entirely different form and content. The ATR in asynchronous transmission is precisely normalized (in order to allow interoperability between cards and readers of different origin), and relatively complex to parse.
Some Chip Cards (mostly of the asynchronous variety) send different ATR depending on if the reset is the first since power-up (Cold ATR) or not (Warm ATR).
Defined in ISO 7816-3 for microprocessor smart cards. Definition for Synchronous Cards is not as well defined.
The ATR is the string of characters These characters consist of an initial character, TS, followed by a maximum of 32 additional characters. Together, these characters provide information to the terminal about how to communicate with the card for the remainder of the session. Each character is described in the following sections.
TB1 and TC1 present, TA1 and TD1 absent; x indicates the number of historical bytes present.
VPP is not required.
’00’ to ‘FF’
Indicates the amount of extra guard time required. Value ‘FF’ has a special meaning. (See TC1 description below.)
Basic EMV ATR for T=1 Only
‘3B’ or ‘3F’
Indicates direct (3B) or inverse (3F) convention.
TB1, TC1, and TD1 present, TA1 is absent; x indicates the number of historical bytes present.
VPP is not required.
’00’ to ‘FF’
Indicates the amount of extra guard time required.
TA2, TB2, and TC2 absent; TD2 present; T=1 to be used.
TA3 and TB3 present; TC3 and TD3 absent; T=1 to be used.
’10’ to ‘FE’
Returns IFSI, which indicates the initial value for the card’s information field size and IFSC of 16 bytes to 254 bytes.
m.s. nibble* ‘0’ to ‘4’; l.s. nibble ‘0’ to ‘5’
BWI = 0 to 4
CWI = 0 to 5
Check character. Exclusive ORing of all ATR bytes from T0 to TCK inclusive is null.
*Note: m.s. nibble = most significant nibble; l.s. nibble = least significant nibble.
TS Initial Character
The first character of the ATR sequence is defined as the initial character, TS. By virtue of its bit pattern, this character synchronizes information and defines the polarity of all subsequent characters. The first four bits of TS consist of a low start bit, followed by two high bits, followed by an additional low bit. This fixed-bit pattern allows timing synchronization. The following three bits are either all high to indicate direct convention, or all low to indicate inverse convention. For direct convention, a high state on the I/O line is equivalent to logic 1, and the data is transmitted least significant bit first. For the inverse convention, a low state on the I/O line is equivalent to logic 1, and the data is transferred most significant bit first. While the specifications allow inverse convention, EMV recommends that the direct convention be used for all current card designs. The final three bits are two low bits followed by a high bit. The last bit in this, or any other 10-bit character frame, is the parity bit; it will be set or cleared to make the number of 1s in the frame an even number.
T0 Format Character
The second character of the ATR sequence is defined as the Format Character, and is called T0. This character contains two parts, both of which determine what characters are contained in the remaining ATR sequence. The most significant four bits are referred to as Y1, and they indicate whether TA1, TB1, TC1, or TD1 will be transmitted. For each logic 1 of Y1, the presence of the respective character is determined as follows:
Bit 8 (msb) = 1 indicates character TD1 will be transmitted
Bit 7 = 1 indicates character TC1 will be transmitted
Bit 6 = 1 indicates character TB1 will be transmitted
Bit 5 = 1 indicates character TA1 will be transmitted
The least significant four bits of T0 are referred to as K. These bits determine the number, 0 to 15, of “historical bytes” that will be contained in the remaining ATR sequence. Historical bytes convey general information about the card such as the card manufacturer, the chip in the card, the masked ROM in the chip, or the card’s state of life. Neither the ISO 7816 nor EMV specifications define precisely what (if any) information is conveyed.
As can be seen in Table 2 above, Y1 bits b7 and b6 are high and bits b8 and b5 are low (‘6x’). This indicates that TC1 and TB1 will be transmitted, and characters TA1 and TD1 will not (as indicated in the table). For protocol T=0, characters TB1 and TC1 complete the basic ATR sequence. In Table 3, bit 8 of Y1 is also high, so character TD1 will also be transmitted for protocol T=1.
While the character TA1 is not transmitted in the basic EMV ATR response for either the T=0 or T=1 protocols, it is defined in the ISO 7816 specifications for other communications. When used, TA1 is broken into upper and lower nibbles. The upper nibble determines the clock-rate conversion factor, F, that is used to modify the frequency of the clock signal. The lower nibble determines D, the bit-rate-adjustment factor that can be used to adjust the bit duration subsequent to the ATR. Use of these parameters is shown in Equation 2 above. The default values of F = 372 and D = 1 are used for the Initial ETU value during the ATR, and will continue to be used during subsequent exchanges unless changed outside the basic ATR.
The TB1 character conveys information on the smart card’s programming voltage requirements. Bits b1 to b5 (called PI1) convey the programming voltage, and bits b6 and b7 (called II) convey the maximum programming current required by the smart card. For the basic ATR, TB1 = ’00’ indicates that the VPP pin is not connected in the smart card.
The TC1 character conveys the value of N, which determines the extra guard time to be added between consecutive characters sent to the smart card from the terminal. This value does not apply to characters sent from the card to the terminal, or to two characters sent in opposite directions. N is a binary number representing the additional ETUs to be added as extra guard time. When TC1 = ‘FF’, the minimum delay between characters should be used. For protocol T=0, this is 12 ETUs, and 11 for T=1. The value of N can be anything between 0 and 255; if TC1 is not returned in the ATR, the terminal will continue as if a value of 00 had been received. Since this value can add time to character transmission, it should be minimized to speed transactions.
The TD1 character indicates if any further interface bytes are to be transmitted, and if so, which protocol will be used. The character TD1 is a specific instance of the generalized character, TDx. The most significant nibble of TDx indicates whether TA(x + 1), TB(x + 1), TC(x + 1), or TD(x + 1) will be transmitted. For each logic 1, the presence of the respective character in subsequent transmissions is determined as follows:
Bit 8 (msb) = 1 indicates character TD(x + 1) will be transmitted
Bit 7 = 1 indicates character TC(x + 1) will be transmitted
Bit 6 = 1 indicates character TB(x + 1) will be transmitted
Bit 5 = 1 indicates character TA(x + 1) will be transmitted
The least significant nibble of the TD1 character (TDx generalized) contains either the value 0x0 or 0x1, indicating protocol T=0 or T=1 respectively.
If protocol T=0 is used, the character TD1 will not be included in the ATR sequence; protocol T=0 will be used for all subsequent transmissions. If protocol T=1 is used, TD1 will be included and will contain the value of 0x81. This latter value indicates that TD2 will be present and protocol T=1 will be used for all subsequent transmissions.
While the character TA2 is not transmitted in the basic EMV ATR response for either the T=0 or T=1 protocols, it is defined in the ISO 7816 specifications. The presence or absence of TA2 determines whether the smart card will operate in specific mode or negotiable mode, respectively, following the ATR. The absence of TA2 indicates that the negotiable mode of operation will be used.
While the character TB2 is not transmitted in the basic EMV ATR response for either the T=0 or T=1 protocols, it is defined in the ISO 7816 specifications. The character TB2 conveys PI2, which determines the value of programming voltage required by the smart card. The value of PI1 in character TB1 is superceded when the character TB2 is present.
While the character TC2 is not transmitted in the basic EMV ATR response for either the T=0 or T=1 protocols, it is defined in the ISO 7816 specifications. When present, TC2 is specific to protocol type T=0. TC2 conveys the work waiting-time integer (WI) that determines the maximum interval between the leading edge of the start bit of any character sent by the smart card and the leading edge of the start bit of the previous character sent either by the card or the terminal. The value of the work waiting time is given as:
Work Waiting Time = 960 × D ×WI
where D is the bit-rate adjustment factor (see description in TA1 above).
When TC2 is not contained in the ATR sequence, the default value of WI = 0x0A is assumed.
The TD2 character has the same function as the TD1 character. For details, see the TD1 description above. In Table 3 for protocol T=1, TD2 is present and contains the value 0x31. This value indicates that: TA3 and TB3 will be present, TC3 and TD3 will be absent, and the protocol type will be T=1.
The TA3 character conveys the Information Field Size Integer (IFSI) for the smart card. IFSI determines the Information Field Size for the smart card which is the maximum length of the Information Field (INF) of blocks that can be received by the card. The Field Size can be any value between 0x01 and 0xFE. Values of 0x0 and 0xFF are reserved for future use. In the basic ATR and using the T=1 protocol, TA3 will have a value in the range of 0x10 to 0xFE, thus indicating an IFSC in the range of 16 to 254 bytes. For an ATR not containing TA3, the terminal will assume a default value of 0x20.
The TB3 character indicates the value of the Character Waiting Time Integer (CWI) and the Block Waiting Time Integer (BWI) used to compute the Character Waiting Time (CWT) and Block Waiting Time (BWT). The least significant nibble of TB3 (b1 to b4) indicates the value of CWI; the most significant nibble (b5 to b8) indicates the value of BWI. In the basic ATR for the T=1 protocol, the TB3 character will have the least significant nibble in the range of 0 to 5 (CWI = 0 to 5), and the most significant nibble in the range 0 to 4 (BWI = 0 to 4).
While the character TC3 is not transmitted in the basic EMV ATR response for either the T=0 or T=1 protocols, it is defined in the ISO 7816 specifications. When TC3 is present, it indicates the type of block-error detection to be used. When TC3 is not present, the default longitudinal redundancy check (LRC) is the block-error checking used.
The TCK character is the check character, and has a value that allows the integrity of the data sent in the ATR to be verified. The value of TCK can be anything, as long as the exclusive ORing of all bytes from T0 to TCK inclusive is zero. TCK is not used for T=0, but will be returned in the ATR in all other cases.
After the necessary parameters have been transferred from the card to the terminal following the terminal’s reception of the last character in the ATR sequence, any necessary adjustments to the interface parameters can be made to the DS8007. Further communications can then commence.
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